Title: NOCs: It is About the Memory and the Programming Model
Speaker: Ivo Bolsens, Sr. VP and CTO, Xilinx Corp.
Abstract: CPUs are multicore (and multi-cache) supported by a coherent, global, shared memory model. FPGAs offer a vast number of distributed programmable function blocks and distributed memory blocks across distributed memory spaces. This presentation will discuss a hybrid computing architecture that unifies the development of applications for a combined CPU-FPGA platform. The proposed programming model is based on message passing (MPI) and distributed memory. NOC's are at the heart of the hybrid platform managing the control and data flows. NOC's are implemented through shared memory buffers on the CPU portion of the hybrid computing platform. On parallel HW, NOC's are implemented as application-specific point-to-point networks exploiting the abundant routing and switching resources of the FPGA. NOC's enable application-specific memory models while keeping with standard, familiar programming models such as MPI.
Bio: Ivo Bolsens is senior vice president and chief technology officer (CTO), with responsibility for advanced technology development, Xilinx research laboratories (XRL) and Xilinx university program (XUP).
Bolsens came to Xilinx in June 2001 from the Belgium-based research center IMEC, where he was vice president of information and communication systems. His research included the development of knowledge-based verification for VLSI circuits, design of digital signal processing applications, and wireless communication terminals. He also headed the research on design technology for high-level synthesis of DSP hardware, HW/SW co-design and system-on-chip design.
Bolsens holds a PhD in applied science and an MSEE from the Catholic University of Leuven in Belgium.